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Searched refs:TMU_TDQ1_SCH_CTRL (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/include/net/pfe_eth/pfe/cbus/
H A Dtmu_csr.h112 #define TMU_TDQ1_SCH_CTRL (TMU_CSR_BASE_ADDR + 0x138) macro
/openbmc/u-boot/drivers/net/pfe_eth/
H A Dpfe_hw.c884 writel(0x3FF, TMU_TDQ1_SCH_CTRL); in tmu_init()