Searched refs:TMIO_SD_CLKCTL_DIV1 (Results 1 – 2 of 2) sorted by relevance
65 #define TMIO_SD_CLKCTL_DIV1 BIT(10) /* SDCLK = CLK */ macro
581 TMIO_SD_CLKCTL_RCAR_DIV1 : TMIO_SD_CLKCTL_DIV1; in tmio_sd_set_clk_rate()