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Searched refs:TLB_W (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/arch/powerpc/include/asm/nohash/32/
H A Dmmu-40x.h50 #define TLB_W 0x00000008 /* Caching is write-through */ macro
/openbmc/linux/arch/microblaze/include/asm/
H A Dmmu.h113 # define TLB_W 0x00000008 /* Caching is write-through */ macro
/openbmc/qemu/target/microblaze/
H A Dmmu.h57 #define TLB_W 0x00000008 /* Caching is write-through */ macro