Searched refs:TIM_SAFE_ENABLE (Results 1 – 2 of 2) sorted by relevance
34 #define TIM_SAFE_ENABLE 0xf1d0dead macro789 REGV_WR32(MTL_VPU_CPU_SS_TIM_SAFE, TIM_SAFE_ENABLE); in ivpu_hw_37xx_wdt_disable()793 REGV_WR32(MTL_VPU_CPU_SS_TIM_SAFE, TIM_SAFE_ENABLE); in ivpu_hw_37xx_wdt_disable()
36 #define TIM_SAFE_ENABLE 0xf1d0dead macro917 REGV_WR32(VPU_40XX_CPU_SS_TIM_SAFE, TIM_SAFE_ENABLE); in ivpu_hw_40xx_wdt_disable()920 REGV_WR32(VPU_40XX_CPU_SS_TIM_SAFE, TIM_SAFE_ENABLE); in ivpu_hw_40xx_wdt_disable()