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Searched refs:TIMER_ENABLE (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/clocksource/
H A Dtimer-qcom.c24 #define TIMER_ENABLE 0x0008 macro
42 u32 ctrl = readl_relaxed(event_base + TIMER_ENABLE); in msm_timer_interrupt()
44 writel_relaxed(ctrl, event_base + TIMER_ENABLE); in msm_timer_interrupt()
53 u32 ctrl = readl_relaxed(event_base + TIMER_ENABLE); in msm_timer_set_next_event()
56 writel_relaxed(ctrl, event_base + TIMER_ENABLE); in msm_timer_set_next_event()
65 writel_relaxed(ctrl | TIMER_ENABLE_EN, event_base + TIMER_ENABLE); in msm_timer_set_next_event()
73 ctrl = readl_relaxed(event_base + TIMER_ENABLE); in msm_timer_shutdown()
75 writel_relaxed(ctrl, event_base + TIMER_ENABLE); in msm_timer_shutdown()
186 writel_relaxed(TIMER_ENABLE_EN, source_base + TIMER_ENABLE); in msm_timer_init()
H A Dtimer-rockchip.c28 #define TIMER_ENABLE 0x1 macro
62 writel_relaxed(TIMER_ENABLE | flags, timer->ctrl); in rk_timer_enable()
/openbmc/u-boot/arch/arm/mach-versatile/
H A Dtimer.c23 #define TIMER_ENABLE (1 << 7) macro
40 tmr_ctrl_val &= ~TIMER_ENABLE; in timer_init()
57 tmr_ctrl_val |= (TIMER_ENABLE | TIMER_PRS_8S); in timer_init()
/openbmc/u-boot/arch/arm/cpu/arm920t/ep93xx/
H A Dtimer.c21 #define TIMER_ENABLE (1 << 7) macro
97 writel(TIMER_ENABLE | TIMER_CLKSEL, in timer_init()
/openbmc/u-boot/arch/microblaze/include/asm/
H A Dmicroblaze_timer.h11 #define TIMER_ENABLE 0x080 /* ENT0 */ macro
/openbmc/linux/arch/hexagon/kernel/
H A Dtime.c22 #define TIMER_ENABLE BIT(0) macro
91 iowrite32(TIMER_ENABLE, &rtos_timer->enable); in set_next_event()
/openbmc/u-boot/arch/microblaze/cpu/
H A Dtimer.c85 tmr->control = TIMER_ENABLE | TIMER_ENABLE_INTR |\ in timer_init()