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Searched refs:TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_RSVD2_MASK (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-mx7/
H A Dcrm_regs.h1946 #define TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_RSVD2_MASK 0x1F000000u macro
1948 …<<TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_RSVD2_SHIFT))&TEMPMON_HW_ANADIG_TEMPSENSE_TRIM_SET_RSVD2_MA…