Searched refs:TEMPMON_HW_ANADIG_TEMPSENSE1_SET_RSVD0_MASK (Results 1 – 1 of 1) sorted by relevance
1866 #define TEMPMON_HW_ANADIG_TEMPSENSE1_SET_RSVD0_MASK 0xF000u macro1868 …t)(x))<<TEMPMON_HW_ANADIG_TEMPSENSE1_SET_RSVD0_SHIFT))&TEMPMON_HW_ANADIG_TEMPSENSE1_SET_RSVD0_MASK)