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Searched refs:TEGRA_DIVIDER_UART (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/clk/tegra/
H A Dclk-divider.c45 if ((divider->flags & TEGRA_DIVIDER_UART) && in clk_frac_div_recalc_rate()
99 if (divider->flags & TEGRA_DIVIDER_UART) { in clk_frac_div_set_rate()
H A Dclk-tegra-periph.c189 30, MASK(2), 0, 0, 16, 1, TEGRA_DIVIDER_UART| \
196 29, MASK(3), 0, 0, 16, 1, TEGRA_DIVIDER_UART| \
H A Dclk.h131 #define TEGRA_DIVIDER_UART BIT(3) macro