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Searched refs:TEGRA_CLK_RESET_BASE (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/arch/arm/include/debug/
H A Dtegra.S21 #define TEGRA_CLK_RESET_BASE 0x60006000 macro
30 #define TEGRA_CLK_RST_DEVICES_L (TEGRA_CLK_RESET_BASE + 0x04)
31 #define TEGRA_CLK_RST_DEVICES_H (TEGRA_CLK_RESET_BASE + 0x08)
32 #define TEGRA_CLK_RST_DEVICES_U (TEGRA_CLK_RESET_BASE + 0x0c)
33 #define TEGRA_CLK_OUT_ENB_L (TEGRA_CLK_RESET_BASE + 0x10)
34 #define TEGRA_CLK_OUT_ENB_H (TEGRA_CLK_RESET_BASE + 0x14)
35 #define TEGRA_CLK_OUT_ENB_U (TEGRA_CLK_RESET_BASE + 0x18)
/openbmc/linux/arch/arm/mach-tegra/
H A Dsleep-tegra30.S300 mov32 r5, TEGRA_CLK_RESET_BASE
370 mov32 r0, TEGRA_CLK_RESET_BASE
598 .word TEGRA_CLK_RESET_BASE + CLK_RESET_CLK_SOURCE_MSELECT @0x18
599 .word TEGRA_CLK_RESET_BASE + CLK_RESET_SCLK_BURST @0x1c
609 .word TEGRA_CLK_RESET_BASE + CLK_RESET_CLK_SOURCE_MSELECT @0x18
610 .word TEGRA_CLK_RESET_BASE + CLK_RESET_SCLK_BURST @0x1c
625 .word TEGRA_CLK_RESET_BASE + CLK_RESET_CLK_SOURCE_MSELECT @0x18
626 .word TEGRA_CLK_RESET_BASE + CLK_RESET_SCLK_BURST @0x1c
H A Diomap.h40 #define TEGRA_CLK_RESET_BASE 0x60006000 macro
H A Dsleep.h16 #define TEGRA_CLK_RESET_VIRT (TEGRA_CLK_RESET_BASE - IO_PPSB_PHYS \
H A Dsleep.S144 mov32 r5, TEGRA_CLK_RESET_BASE
H A Dsleep-tegra20.S196 mov32 r0, TEGRA_CLK_RESET_BASE
392 mov32 r5, TEGRA_CLK_RESET_BASE
H A Dreset-handler.S243 mov32 r7, TEGRA_CLK_RESET_BASE