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Searched refs:TEGRA30_CLK_PLL_U (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dtegra30-car.h217 #define TEGRA30_CLK_PLL_U 190 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dtegra30-car.h214 #define TEGRA30_CLK_PLL_U 190 macro
/openbmc/u-boot/arch/arm/dts/
H A Dtegra30.dtsi816 <&tegra_car TEGRA30_CLK_PLL_U>,
853 <&tegra_car TEGRA30_CLK_PLL_U>,
889 <&tegra_car TEGRA30_CLK_PLL_U>,
/openbmc/linux/drivers/clk/tegra/
H A Dclk-tegra30.c549 { .con_id = "pll_u", .dt_id = TEGRA30_CLK_PLL_U },
848 clks[TEGRA30_CLK_PLL_U] = clk; in tegra30_pll_init()
1228 { TEGRA30_CLK_PLL_U, TEGRA30_CLK_CLK_MAX, 480000000, 0 },
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30.dtsi1132 <&tegra_car TEGRA30_CLK_PLL_U>,
1175 <&tegra_car TEGRA30_CLK_PLL_U>,
1217 <&tegra_car TEGRA30_CLK_PLL_U>,