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Searched refs:TEGRA20_CLK_UARTE (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/include/dt-bindings/clock/
H A Dtegra20-car.h87 #define TEGRA20_CLK_UARTE 66 macro
/openbmc/linux/include/dt-bindings/clock/
H A Dtegra20-car.h88 #define TEGRA20_CLK_UARTE 66 macro
/openbmc/linux/drivers/clk/tegra/
H A Dclk-tegra20.c511 { .dev_id = "tegra_uart.4", .dt_id = TEGRA20_CLK_UARTE },
778 …IV("uarte", mux_pllpcm_clkm, CLK_SOURCE_UARTE, 30, 2, 66, TEGRA_PERIPH_ON_APB, TEGRA20_CLK_UARTE),
1029 { TEGRA20_CLK_UARTE, TEGRA20_CLK_PLL_P, 0, 0 },
/openbmc/u-boot/arch/arm/dts/
H A Dtegra20.dtsi371 clocks = <&tegra_car TEGRA20_CLK_UARTE>;
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra20.dtsi491 clocks = <&tegra_car TEGRA20_CLK_UARTE>;