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Searched refs:TEGRA20_CLK_PLL_C (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/clk/tegra/
H A Dclk-tegra20.c420 { .con_id = "pll_c", .dt_id = TEGRA20_CLK_PLL_C },
632 clks[TEGRA20_CLK_PLL_C] = clk; in tegra20_pll_init()
1018 { TEGRA20_CLK_PLL_C, TEGRA20_CLK_CLK_MAX, 600000000, 0 },
1042 { TEGRA20_CLK_HOST1X, TEGRA20_CLK_PLL_C, 150000000, 0 },
1043 { TEGRA20_CLK_GR2D, TEGRA20_CLK_PLL_C, 300000000, 0 },
1044 { TEGRA20_CLK_GR3D, TEGRA20_CLK_PLL_C, 300000000, 0 },
1045 { TEGRA20_CLK_VDE, TEGRA20_CLK_PLL_C, 300000000, 0 },
/openbmc/linux/include/dt-bindings/clock/
H A Dtegra20-car.h137 #define TEGRA20_CLK_PLL_C 114 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dtegra20-car.h136 #define TEGRA20_CLK_PLL_C 114 macro
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra20-asus-tf101.dts904 assigned-clock-parents = <&tegra_car TEGRA20_CLK_PLL_C>;
H A Dtegra20-acer-a500-picasso.dts1131 assigned-clock-parents = <&tegra_car TEGRA20_CLK_PLL_C>;