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Searched refs:TEGRA20_CLK_CDEV1 (Results 1 – 18 of 18) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dtegra20-car.h116 #define TEGRA20_CLK_CDEV1 94 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dtegra20-car.h115 #define TEGRA20_CLK_CDEV1 94 macro
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra20-plutux.dts59 <&tegra_car TEGRA20_CLK_CDEV1>;
H A Dtegra20-tec.dts68 <&tegra_car TEGRA20_CLK_CDEV1>;
H A Dtegra20-medcom-wide.dts94 <&tegra_car TEGRA20_CLK_CDEV1>;
H A Dtegra20-trimslice.dts474 <&tegra_car TEGRA20_CLK_CDEV1>;
H A Dtegra20-ventana.dts721 <&tegra_car TEGRA20_CLK_CDEV1>;
H A Dtegra20-paz00.dts688 <&tegra_car TEGRA20_CLK_CDEV1>;
H A Dtegra20-harmony.dts760 <&tegra_car TEGRA20_CLK_CDEV1>;
H A Dtegra20-colibri.dtsi775 <&tegra_car TEGRA20_CLK_CDEV1>;
H A Dtegra20-seaboard.dts919 <&tegra_car TEGRA20_CLK_CDEV1>;
H A Dtegra20-asus-tf101.dts1204 <&tegra_car TEGRA20_CLK_CDEV1>;
H A Dtegra20-acer-a500-picasso.dts1436 <&tegra_car TEGRA20_CLK_CDEV1>;
/openbmc/linux/drivers/clk/tegra/
H A Dclk-tegra20.c462 { .con_id = "cdev1", .dt_id = TEGRA20_CLK_CDEV1 },
830 clks[TEGRA20_CLK_CDEV1] = clk; in tegra20_periph_clk_init()
1102 if (clkspec->args[0] == TEGRA20_CLK_CDEV1 || in tegra20_clk_src_onecell_get()
/openbmc/u-boot/arch/arm/dts/
H A Dtegra20-paz00.dts633 <&tegra_car TEGRA20_CLK_CDEV1>;
H A Dtegra20-ventana.dts726 <&tegra_car TEGRA20_CLK_CDEV1>;
H A Dtegra20-harmony.dts811 <&tegra_car TEGRA20_CLK_CDEV1>;
H A Dtegra20-seaboard.dts981 <&tegra_car TEGRA20_CLK_CDEV1>;