Searched refs:TEGRA20_AC97_FIFO_TX1 (Results 1 – 2 of 2) sorted by relevance
252 case TEGRA20_AC97_FIFO_TX1: in tegra20_ac97_wr_rd_reg()267 case TEGRA20_AC97_FIFO_TX1: in tegra20_ac97_volatile_reg()280 case TEGRA20_AC97_FIFO_TX1: in tegra20_ac97_precious_reg()372 ac97->playback_dma_data.addr = mem->start + TEGRA20_AC97_FIFO_TX1; in tegra20_ac97_platform_probe()
23 #define TEGRA20_AC97_FIFO_TX1 0x40 macro