Searched refs:TEGRA186_CLK_PLLC4_VCO (Results 1 – 3 of 3) sorted by relevance
853 #define TEGRA186_CLK_PLLC4_VCO 524 macro
852 #define TEGRA186_CLK_PLLC4_VCO 524 macro
938 <&bpmp TEGRA186_CLK_PLLC4_VCO>;939 assigned-clock-parents = <&bpmp TEGRA186_CLK_PLLC4_VCO>;