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Searched refs:TD_PERF_SEL_start_cycle_0 (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_enum.h4533 TD_PERF_SEL_start_cycle_0 = 0x32, enumerator
H A Dgfx_8_1_enum.h5032 TD_PERF_SEL_start_cycle_0 = 0x32, enumerator
H A Dgfx_8_0_enum.h4977 TD_PERF_SEL_start_cycle_0 = 0x32, enumerator
/openbmc/linux/drivers/gpu/drm/amd/include/
H A Dvega10_enum.h16254 TD_PERF_SEL_start_cycle_0 = 0x00000032, enumerator