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Searched refs:TD_CNTL__SYNC_PHASE_VC_SMX_MASK (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h10916 #define TD_CNTL__SYNC_PHASE_VC_SMX_MASK 0x00000030L macro
H A Dgfx_7_2_sh_mask.h13869 #define TD_CNTL__SYNC_PHASE_VC_SMX_MASK 0x30 macro
H A Dgfx_8_0_sh_mask.h15737 #define TD_CNTL__SYNC_PHASE_VC_SMX_MASK 0x30 macro
H A Dgfx_8_1_sh_mask.h16307 #define TD_CNTL__SYNC_PHASE_VC_SMX_MASK 0x30 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h4567 #define TD_CNTL__SYNC_PHASE_VC_SMX_MASK … macro
H A Dgc_9_2_1_sh_mask.h3945 #define TD_CNTL__SYNC_PHASE_VC_SMX_MASK … macro
H A Dgc_9_1_sh_mask.h4039 #define TD_CNTL__SYNC_PHASE_VC_SMX_MASK … macro
H A Dgc_10_1_0_sh_mask.h8814 #define TD_CNTL__SYNC_PHASE_VC_SMX_MASK … macro