Searched refs:TCON_CH1_SCLK2_DIV_MASK (Results 1 – 1 of 1) sorted by relevance
20 #define TCON_CH1_SCLK2_DIV_MASK 0xf macro178 parent_rate /= (reg & TCON_CH1_SCLK2_DIV_MASK) + 1; in tcon_ch1_recalc_rate()199 reg &= ~(TCON_CH1_SCLK2_DIV_MASK | TCON_CH1_SCLK1_HALF_BIT); in tcon_ch1_set_rate()200 reg |= (div_m - 1) & TCON_CH1_SCLK2_DIV_MASK; in tcon_ch1_set_rate()