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Searched refs:TCI_CNTL_2__L1_INVAL_ON_WBINVL2_MASK (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h10728 #define TCI_CNTL_2__L1_INVAL_ON_WBINVL2_MASK 0x00000001L macro
H A Dgfx_7_2_sh_mask.h14609 #define TCI_CNTL_2__L1_INVAL_ON_WBINVL2_MASK 0x1 macro
H A Dgfx_8_1_sh_mask.h17125 #define TCI_CNTL_2__L1_INVAL_ON_WBINVL2_MASK 0x1 macro
H A Dgfx_8_0_sh_mask.h16537 #define TCI_CNTL_2__L1_INVAL_ON_WBINVL2_MASK 0x1 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h9092 #define TCI_CNTL_2__L1_INVAL_ON_WBINVL2_MASK … macro
H A Dgc_9_1_sh_mask.h10597 #define TCI_CNTL_2__L1_INVAL_ON_WBINVL2_MASK … macro
H A Dgc_9_2_1_sh_mask.h10427 #define TCI_CNTL_2__L1_INVAL_ON_WBINVL2_MASK … macro
H A Dgc_9_4_3_sh_mask.h11927 #define TCI_CNTL_2__L1_INVAL_ON_WBINVL2_MASK … macro
H A Dgc_9_4_2_sh_mask.h27823 #define TCI_CNTL_2__L1_INVAL_ON_WBINVL2_MASK … macro
H A Dgc_10_1_0_sh_mask.h15735 #define TCI_CNTL_2__L1_INVAL_ON_WBINVL2_MASK … macro
H A Dgc_10_3_0_sh_mask.h14534 #define TCI_CNTL_2__L1_INVAL_ON_WBINVL2_MASK … macro