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Searched refs:TCG_TARGET_HAS_mulsh_i32 (Results 1 – 13 of 13) sorted by relevance

/openbmc/qemu/tcg/tci/
H A Dtcg-target.h74 #define TCG_TARGET_HAS_mulsh_i32 0 macro
/openbmc/qemu/tcg/arm/
H A Dtcg-target.h121 #define TCG_TARGET_HAS_mulsh_i32 0 macro
/openbmc/qemu/tcg/sparc64/
H A Dtcg-target.h113 #define TCG_TARGET_HAS_mulsh_i32 0 macro
/openbmc/qemu/tcg/mips/
H A Dtcg-target.h129 #define TCG_TARGET_HAS_mulsh_i32 1 macro
/openbmc/qemu/tcg/riscv/
H A Dtcg-target.h100 #define TCG_TARGET_HAS_mulsh_i32 0 macro
/openbmc/qemu/tcg/loongarch64/
H A Dtcg-target.h114 #define TCG_TARGET_HAS_mulsh_i32 1 macro
/openbmc/qemu/tcg/aarch64/
H A Dtcg-target.h97 #define TCG_TARGET_HAS_mulsh_i32 0 macro
/openbmc/qemu/tcg/ppc/
H A Dtcg-target.h102 #define TCG_TARGET_HAS_mulsh_i32 1 macro
/openbmc/qemu/tcg/s390x/
H A Dtcg-target.h103 #define TCG_TARGET_HAS_mulsh_i32 0 macro
/openbmc/qemu/tcg/i386/
H A Dtcg-target.h157 #define TCG_TARGET_HAS_mulsh_i32 0 macro
/openbmc/qemu/include/tcg/
H A Dtcg-opc.h91 DEF(mulsh_i32, 1, 2, 0, IMPL(TCG_TARGET_HAS_mulsh_i32))
/openbmc/qemu/tcg/
H A Dtcg.c2028 return TCG_TARGET_HAS_mulsh_i32; in tcg_op_supported()
3784 have_opc_new2 = TCG_TARGET_HAS_mulsh_i32; in liveness_pass_1()
H A Dtcg-op.c1202 } else if (TCG_TARGET_HAS_mulsh_i32) { in tcg_gen_muls2_i32()