Home
last modified time | relevance | path

Searched refs:TCG_MO_ALL (Results 1 – 25 of 29) sorted by relevance

12

/openbmc/qemu/target/s390x/
H A Dcpu-param.h20 #define TCG_GUEST_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD)
/openbmc/qemu/include/tcg/
H A Dtcg-mo.h38 TCG_MO_ALL = 0x0F, /* OR of the above */ enumerator
/openbmc/qemu/target/microblaze/
H A Dcpu-param.h33 #define TCG_GUEST_DEFAULT_MO TCG_MO_ALL
H A Dtranslate.c1220 tcg_gen_mb(TCG_BAR_SC | TCG_MO_ALL); in trans_mbar()
/openbmc/qemu/target/hppa/
H A Dcpu-param.h30 #define TCG_GUEST_DEFAULT_MO TCG_MO_ALL
/openbmc/qemu/target/i386/
H A Dcpu-param.h28 #define TCG_GUEST_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD)
/openbmc/qemu/target/ppc/translate/
H A Dmisc-impl.c.inc26 TCGBar bar = TCG_MO_ALL;
84 TCGBar bar = TCG_MO_ALL;
119 * The end result is that CI memory ordering requires TCG_MO_ALL
/openbmc/qemu/target/riscv/insn_trans/
H A Dtrans_rva.c.inc40 tcg_gen_mb(TCG_MO_ALL | TCG_BAR_STRL);
48 tcg_gen_mb(TCG_MO_ALL | TCG_BAR_LDAQ);
86 tcg_gen_mb(TCG_MO_ALL + a->aq * TCG_BAR_LDAQ + bar_strl);
H A Dtrans_rvi.c.inc282 tcg_gen_mb(TCG_MO_ALL | TCG_BAR_LDAQ);
343 tcg_gen_mb(TCG_MO_ALL | TCG_BAR_STRL);
814 tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC);
H A Dtrans_rvv.c.inc663 tcg_gen_mb(TCG_MO_ALL | TCG_BAR_STRL);
671 tcg_gen_mb(TCG_MO_ALL | TCG_BAR_LDAQ);
/openbmc/qemu/tcg/s390x/
H A Dtcg-target.h176 #define TCG_TARGET_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD)
/openbmc/qemu/tcg/i386/
H A Dtcg-target.h249 #define TCG_TARGET_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD)
/openbmc/qemu/target/loongarch/tcg/insn_trans/
H A Dtrans_memory.c.inc120 tcg_gen_mb(TCG_BAR_SC | TCG_MO_ALL);
/openbmc/qemu/accel/tcg/
H A Dtranslate-all.c352 tcg_ctx->guest_mo = TCG_MO_ALL; in tb_gen_code()
/openbmc/qemu/target/arm/tcg/
H A Dtranslate-a64.c1939 bar = TCG_BAR_SC | TCG_MO_ALL; in trans_DSB_DMB()
1967 tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC); in trans_SB()
2931 tcg_gen_mb(TCG_MO_ALL | TCG_BAR_STRL); in trans_STXR()
2944 tcg_gen_mb(TCG_MO_ALL | TCG_BAR_LDAQ); in trans_LDXR()
2966 tcg_gen_mb(TCG_MO_ALL | TCG_BAR_STRL); in trans_STLR()
2994 tcg_gen_mb(TCG_MO_ALL | TCG_BAR_LDAQ); in trans_LDAR()
3004 tcg_gen_mb(TCG_MO_ALL | TCG_BAR_STRL); in trans_STXP()
3017 tcg_gen_mb(TCG_MO_ALL | TCG_BAR_LDAQ); in trans_LDXP()
3565 tcg_gen_mb(TCG_MO_ALL | TCG_BAR_LDAQ); in TRANS_FEAT()
3638 tcg_gen_mb(TCG_MO_ALL | TCG_BAR_LDAQ); in trans_LDAPR_i()
[all …]
H A Dtranslate.c5311 tcg_gen_mb(TCG_MO_ALL | TCG_BAR_STRL); in op_strex()
5426 tcg_gen_mb(TCG_MO_ALL | TCG_BAR_STRL); in op_stl()
5471 tcg_gen_mb(TCG_MO_ALL | TCG_BAR_LDAQ); in op_ldrex()
5584 tcg_gen_mb(TCG_MO_ALL | TCG_BAR_STRL); in op_lda()
7124 tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC); in trans_DSB()
7156 tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC); in trans_SB()
/openbmc/qemu/target/openrisc/
H A Dtranslate.c1085 tcg_gen_mb(TCG_MO_ALL); in trans_l_msync()
/openbmc/qemu/tcg/mips/
H A Dtcg-target.c.inc1568 [0 ... TCG_MO_ALL] = OPC_SYNC_MB,
1575 tcg_out32(s, sync[a0 & TCG_MO_ALL]);
/openbmc/qemu/target/sh4/
H A Dtranslate.c1591 tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC); in _decode_opc()
/openbmc/qemu/target/xtensa/
H A Dtranslate.c1672 tcg_gen_mb(TCG_BAR_STRL | TCG_MO_ALL); in translate_ldst()
1678 tcg_gen_mb(TCG_BAR_LDAQ | TCG_MO_ALL); in translate_ldst()
1797 tcg_gen_mb(TCG_BAR_SC | TCG_MO_ALL); in translate_memw()
/openbmc/qemu/target/alpha/
H A Dtranslate.c2300 tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC); in translate_one()
/openbmc/qemu/tcg/aarch64/
H A Dtcg-target.c.inc1647 [0 ... TCG_MO_ALL] = DMB_ISH | DMB_LD | DMB_ST,
1653 tcg_out32(s, sync[a0 & TCG_MO_ALL]);
/openbmc/qemu/tcg/sparc64/
H A Dtcg-target.c.inc937 tcg_out32(s, MEMBAR | (a0 & TCG_MO_ALL));
/openbmc/qemu/tcg/
H A Dtcg.c2767 switch (membar & TCG_MO_ALL) { in tcg_dump_ops()
2813 case TCG_MO_ALL: in tcg_dump_ops()
/openbmc/qemu/target/s390x/tcg/
H A Dtranslate.c1488 tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC); in op_bc()
1493 tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC); in op_bc()

12