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Searched refs:TCGReg (Results 1 – 24 of 24) sorted by relevance

/openbmc/qemu/tcg/loongarch64/
H A Dtcg-insn-defs.c.inc1419 tcg_out_opc_or(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
1745 tcg_out_opc_vfmadd_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk, TCGReg va)
1752 tcg_out_opc_vfmadd_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk, TCGReg va)
1759 tcg_out_opc_vfmsub_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk, TCGReg va)
1766 tcg_out_opc_vfmsub_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk, TCGReg va)
1773 tcg_out_opc_vfnmadd_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk, TCGReg va)
1780 tcg_out_opc_vfnmadd_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk, TCGReg va)
1787 tcg_out_opc_vfnmsub_s(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk, TCGReg va)
1794 tcg_out_opc_vfnmsub_d(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk, TCGReg va)
2109 tcg_out_opc_vbitsel_v(TCGContext *s, TCGReg vd, TCGReg vj, TCGReg vk, TCGReg va)
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H A Dtcg-target.c.inc468 static void tcg_out_addi_ptr(TCGContext *s, TCGReg rd, TCGReg rs,
475 static void tcg_out_ext8u(TCGContext *s, TCGReg ret, TCGReg arg)
480 static void tcg_out_ext16u(TCGContext *s, TCGReg ret, TCGReg arg)
485 static void tcg_out_ext32u(TCGContext *s, TCGReg ret, TCGReg arg)
500 static void tcg_out_ext32s(TCGContext *s, TCGReg ret, TCGReg arg)
523 TCGReg a0, TCGReg a1, TCGReg a2,
673 TCGReg v1, TCGReg v2)
676 TCGReg t;
878 TCGReg base;
879 TCGReg index;
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H A Dtcg-target.h88 } TCGReg; typedef
/openbmc/qemu/tcg/tci/
H A Dtcg-target.c.inc331 TCGReg r0, TCGReg r1, TCGArg m2)
344 TCGReg r0, TCGReg r1, TCGReg r2)
356 TCGReg r0, TCGReg r1, intptr_t i2)
384 TCGReg r0, TCGReg r1, TCGReg r2, TCGCond c3)
413 TCGReg r1, TCGReg r2, TCGReg r3, TCGReg r4)
427 TCGReg r0, TCGReg r1, TCGReg r2, TCGReg r3)
440 TCGReg r0, TCGReg r1, TCGReg r2,
441 TCGReg r3, TCGReg r4, TCGCond c5)
456 TCGReg r0, TCGReg r1, TCGReg r2,
457 TCGReg r3, TCGReg r4, TCGReg r5)
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H A Dtcg-target.h145 } TCGReg; typedef
/openbmc/qemu/tcg/arm/
H A Dtcg-target.c.inc562 TCGReg rd, TCGReg rn, TCGReg rm, int shift)
673 tcg_out_ldrd_rwb(TCGContext *s, ARMCond cond, TCGReg rt, TCGReg rn, TCGReg rm)
752 TCGReg rn, TCGReg rm)
758 TCGReg rn, TCGReg rm)
919 TCGReg rd1, TCGReg rn, TCGReg rm)
927 TCGReg rd1, TCGReg rn, TCGReg rm)
935 TCGReg rd, TCGReg rn, TCGReg rm)
941 TCGReg rd, TCGReg rn, TCGReg rm)
1268 TCGReg d, TCGReg m)
1275 TCGReg d, TCGReg n, TCGReg m)
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H A Dtcg-target.h73 } TCGReg; typedef
/openbmc/qemu/tcg/sparc64/
H A Dtcg-target.c.inc351 static void tcg_out_arith(TCGContext *s, TCGReg rd, TCGReg rs1,
357 static void tcg_out_arithi(TCGContext *s, TCGReg rd, TCGReg rs1,
363 static void tcg_out_arithc(TCGContext *s, TCGReg rd, TCGReg rs1,
501 static void tcg_out_ext8u(TCGContext *s, TCGReg rd, TCGReg rs)
506 static void tcg_out_ext16u(TCGContext *s, TCGReg rd, TCGReg rs)
512 static void tcg_out_ext32s(TCGContext *s, TCGReg rd, TCGReg rs)
517 static void tcg_out_ext32u(TCGContext *s, TCGReg rd, TCGReg rs)
542 static void tcg_out_addi_ptr(TCGContext *s, TCGReg rd, TCGReg rs,
555 static void tcg_out_ldst(TCGContext *s, TCGReg ret, TCGReg addr,
594 static void tcg_out_div32(TCGContext *s, TCGReg rd, TCGReg rs1,
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H A Dtcg-target.h65 } TCGReg; typedef
/openbmc/qemu/tcg/mips/
H A Dtcg-target.c.inc368 TCGReg rd, TCGReg rs, TCGReg rt)
383 TCGReg rt, TCGReg rs, TCGArg imm)
437 TCGReg rd, TCGReg rt, TCGArg sa)
825 static void tcg_out_addsub2(TCGContext *s, TCGReg rl, TCGReg rh, TCGReg al,
879 TCGReg arg1, TCGReg arg2)
947 TCGReg arg1, TCGReg arg2)
1000 TCGReg al, TCGReg ah, TCGReg bl, TCGReg bh)
1027 TCGReg al, TCGReg ah, TCGReg bl, TCGReg bh)
1046 TCGReg c1, TCGReg c2, TCGReg v1, TCGReg v2)
1451 TCGReg addrlo, TCGReg addrhi,
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H A Dtcg-target.h71 } TCGReg; typedef
/openbmc/qemu/tcg/riscv/
H A Dtcg-target.c.inc295 static int32_t encode_r(RISCVInsn opc, TCGReg rd, TCGReg rs1, TCGReg rs2)
384 TCGReg rd, TCGReg rs1, TCGReg rs2)
390 TCGReg rd, TCGReg rs1, TCGArg imm)
589 static void tcg_out_ext8u(TCGContext *s, TCGReg ret, TCGReg arg)
722 TCGReg rl, TCGReg rh,
723 TCGReg al, TCGReg ah,
943 TCGReg tmp;
1023 TCGReg cmp1, TCGReg cmp2,
1046 TCGReg cmp1, TCGReg cmp2,
1050 TCGReg tmp;
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H A Dtcg-target.h72 } TCGReg; typedef
/openbmc/qemu/tcg/aarch64/
H A Dtcg-target.c.inc632 TCGReg rt, TCGReg rt2, TCGReg rn)
660 TCGReg r1, TCGReg r2, TCGReg rn,
698 TCGReg rd, TCGReg rn, TCGReg rm, int imms)
741 TCGReg rd, TCGReg rn, TCGReg rm)
751 TCGReg rd, TCGReg rn, TCGReg rm, TCGCond c)
758 TCGReg rd, TCGReg rn)
764 TCGReg rd, TCGReg rn, TCGReg rm, TCGReg ra)
792 unsigned size, TCGReg rd, TCGReg rn, TCGReg rm)
812 unsigned size, TCGReg rd, TCGReg rn, TCGReg rm)
1006 TCGReg rd, TCGReg rs)
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H A Dtcg-target.h48 } TCGReg; typedef
/openbmc/qemu/tcg/
H A Dtci.c92 static void tci_args_rr(uint32_t insn, TCGReg *r0, TCGReg *r1) in tci_args_rr()
112 static void tci_args_rrr(uint32_t insn, TCGReg *r0, TCGReg *r1, TCGReg *r2) in tci_args_rrr()
126 static void tci_args_rrbb(uint32_t insn, TCGReg *r0, TCGReg *r1, in tci_args_rrbb()
136 TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGCond *c3) in tci_args_rrrc()
144 static void tci_args_rrrbb(uint32_t insn, TCGReg *r0, TCGReg *r1, in tci_args_rrrbb()
154 static void tci_args_rrrrr(uint32_t insn, TCGReg *r0, TCGReg *r1, in tci_args_rrrrr()
155 TCGReg *r2, TCGReg *r3, TCGReg *r4) in tci_args_rrrrr()
165 TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGReg *r3) in tci_args_rrrr()
173 static void tci_args_rrrrrc(uint32_t insn, TCGReg *r0, TCGReg *r1, in tci_args_rrrrrc()
174 TCGReg *r2, TCGReg *r3, TCGReg *r4, TCGCond *c5) in tci_args_rrrrrc()
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H A Dtcg.c120 static void tcg_out_ext8u(TCGContext *s, TCGReg ret, TCGReg arg);
121 static void tcg_out_ext16u(TCGContext *s, TCGReg ret, TCGReg arg);
122 static void tcg_out_ext32s(TCGContext *s, TCGReg ret, TCGReg arg);
123 static void tcg_out_ext32u(TCGContext *s, TCGReg ret, TCGReg arg);
136 TCGReg dst, TCGReg src);
147 TCGReg dst, TCGReg src) in tcg_out_dup_vec()
440 TCGReg src;
4404 TCGReg reg; in temp_load()
4781 TCGReg reg; in tcg_reg_alloc_op()
5286 TCGReg reg; in load_arg_ref()
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/openbmc/qemu/tcg/s390x/
H A Dtcg-target.c.inc587 TCGReg r1, TCGReg r2)
594 TCGReg r1, TCGReg r2, TCGReg r3)
601 TCGReg r1, TCGReg r2, TCGReg r3, int m4)
607 TCGReg r1, TCGReg r2, int m3)
648 static int RXB(TCGReg v1, TCGReg v2, TCGReg v3, TCGReg v4)
699 TCGReg v1, TCGReg v2, TCGReg v3, int m4)
710 TCGReg v1, TCGReg v2, TCGReg v3, TCGReg v4)
722 TCGReg v1, TCGReg r2, TCGReg r3)
917 TCGReg data, TCGReg base, TCGReg index,
942 TCGReg data, TCGReg base, TCGReg index,
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H A Dtcg-target.h33 typedef enum TCGReg { enum
50 } TCGReg; typedef
/openbmc/qemu/tcg/ppc/
H A Dtcg-target.c.inc861 static void tcg_out_ext8u(TCGContext *s, TCGReg dst, TCGReg src)
871 static void tcg_out_ext16u(TCGContext *s, TCGReg dst, TCGReg src)
876 static void tcg_out_ext32s(TCGContext *s, TCGReg dst, TCGReg src)
882 static void tcg_out_ext32u(TCGContext *s, TCGReg dst, TCGReg src)
1311 static void tcg_out_addi_ptr(TCGContext *s, TCGReg rd, TCGReg rs,
1551 TCGReg va, TCGReg vb, int shb)
2262 TCGReg base;
2263 TCGReg index;
2482 TCGReg addrlo, TCGReg addrhi,
2533 TCGReg addrlo, TCGReg addrhi,
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H A Dtcg-target.h56 } TCGReg; typedef
/openbmc/qemu/tcg/i386/
H A Dtcg-target.c.inc886 TCGReg r, TCGReg a)
1066 static void tcg_out_addi_ptr(TCGContext *s, TCGReg rd, TCGReg rs,
1247 static void tcg_out_ext8u(TCGContext *s, TCGReg dest, TCGReg src)
1262 static void tcg_out_ext16u(TCGContext *s, TCGReg dest, TCGReg src)
1275 static void tcg_out_ext32u(TCGContext *s, TCGReg dest, TCGReg src)
1672 TCGReg dest, TCGReg v1)
1815 TCGReg base;
1867 TCGReg l, TCGReg h, TCGReg v)
1879 TCGReg v, TCGReg l, TCGReg h)
2253 TCGReg addrlo, TCGReg addrhi,
[all …]
H A Dtcg-target.h91 } TCGReg; typedef
/openbmc/qemu/include/tcg/
H A Dtcg.h405 TCGReg reg:8;
794 void tcg_set_frame(TCGContext *s, TCGReg reg, intptr_t start, intptr_t size);