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Searched refs:TCC_PERFCOUNTER0_SELECT__PERF_SEL1_MASK (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h10676 #define TCC_PERFCOUNTER0_SELECT__PERF_SEL1_MASK 0x000ffc00L macro
H A Dgfx_7_2_sh_mask.h13681 #define TCC_PERFCOUNTER0_SELECT__PERF_SEL1_MASK 0xffc00 macro
H A Dgfx_8_0_sh_mask.h15603 #define TCC_PERFCOUNTER0_SELECT__PERF_SEL1_MASK 0xffc00 macro
H A Dgfx_8_1_sh_mask.h16173 #define TCC_PERFCOUNTER0_SELECT__PERF_SEL1_MASK 0xffc00 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h22073 #define TCC_PERFCOUNTER0_SELECT__PERF_SEL1_MASK … macro
H A Dgc_9_2_1_sh_mask.h23379 #define TCC_PERFCOUNTER0_SELECT__PERF_SEL1_MASK … macro
H A Dgc_9_1_sh_mask.h23384 #define TCC_PERFCOUNTER0_SELECT__PERF_SEL1_MASK … macro
H A Dgc_9_4_3_sh_mask.h25564 #define TCC_PERFCOUNTER0_SELECT__PERF_SEL1_MASK … macro
H A Dgc_9_4_2_sh_mask.h17196 #define TCC_PERFCOUNTER0_SELECT__PERF_SEL1_MASK … macro