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Searched refs:TB_CFG_PORT (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/thunderbolt/
H A Dusb4.c191 if (tb_port_read(port, &val, TB_CFG_PORT, in usb4_switch_check_wakes()
221 if (tb_port_read(port, &val, TB_CFG_PORT, in link_is_usb4()
432 ret = tb_port_read(port, &val, TB_CFG_PORT, in usb4_switch_set_wake()
1131 ret = tb_port_read(port, &val, TB_CFG_PORT, in usb4_port_reset()
1145 ret = tb_port_read(port, &val, TB_CFG_PORT, in usb4_port_reset()
1164 ret = tb_port_read(port, &val, TB_CFG_PORT, in usb4_port_set_configured()
1208 ret = tb_port_read(port, &val, TB_CFG_PORT, in usb4_set_xdomain_configured()
1315 ret = tb_port_read(port, &val, TB_CFG_PORT, in usb4_port_sb_read()
1362 ret = tb_port_read(port, &val, TB_CFG_PORT, in usb4_port_sb_write()
1489 ret = tb_port_read(port, &val, TB_CFG_PORT, in usb4_port_clx_supported()
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H A Dclx.c43 ret = tb_port_read(port, &phy, TB_CFG_PORT, in tb_port_pm_secondary_set()
53 return tb_port_write(port, &phy, TB_CFG_PORT, in tb_port_pm_secondary_set()
95 ret = tb_port_read(port, &val, TB_CFG_PORT, in tb_port_clx_supported()
118 ret = tb_port_read(port, &phy, TB_CFG_PORT, in tb_port_clx_set()
128 return tb_port_write(port, &phy, TB_CFG_PORT, in tb_port_clx_set()
150 ret = tb_port_read(port, &val, TB_CFG_PORT, in tb_port_clx()
H A Dtmu.c179 return tb_port_write(port, &data, TB_CFG_PORT, in tb_port_tmu_write()
210 ret = tb_port_read(port, &val, TB_CFG_PORT, in tb_port_tmu_is_unidirectional()
223 ret = tb_port_read(port, &val, TB_CFG_PORT, in tb_port_tmu_is_enhanced()
240 ret = tb_port_read(port, &val, TB_CFG_PORT, in tb_port_tmu_enhanced_enable()
250 return tb_port_write(port, &val, TB_CFG_PORT, in tb_port_tmu_enhanced_enable()
265 ret = tb_port_read(port, &val, TB_CFG_PORT, in tb_port_set_tmu_mode_params()
275 ret = tb_port_write(port, &val, TB_CFG_PORT, in tb_port_set_tmu_mode_params()
280 ret = tb_port_read(port, &val, TB_CFG_PORT, in tb_port_set_tmu_mode_params()
290 return tb_port_write(port, &val, TB_CFG_PORT, in tb_port_set_tmu_mode_params()
303 ret = tb_port_read(port, &val, TB_CFG_PORT, in tb_port_tmu_rate_write()
[all …]
H A Dcap.c58 tb_port_read(port, &dummy, TB_CFG_PORT, 0, 1); in tb_port_dummy_read()
80 ret = tb_port_read(port, &header, TB_CFG_PORT, offset, 1); in tb_port_next_cap()
99 ret = tb_port_read(port, &header, TB_CFG_PORT, offset, 1); in __tb_port_find_cap()
H A Dswitch.c593 TB_CFG_PORT, ADP_CS_4, 1); in tb_port_add_nfc_credits()
636 ret = tb_port_read(port, &phy, TB_CFG_PORT, in __tb_port_enable()
647 ret = tb_port_write(port, &phy, TB_CFG_PORT, in __tb_port_enable()
906 ret = tb_port_read(port, &val, TB_CFG_PORT, in tb_port_get_link_speed()
981 ret = tb_port_read(port, &val, TB_CFG_PORT, in tb_port_get_link_width()
1013 ret = tb_port_read(port, &phy, TB_CFG_PORT, in tb_port_width_supported()
1044 ret = tb_port_read(port, &val, TB_CFG_PORT, in tb_port_set_link_width()
1098 ret = tb_port_read(port, &val, TB_CFG_PORT, in tb_port_set_lane_bonding()
1350 if (tb_port_read(port, &data, TB_CFG_PORT, in tb_usb3_port_is_enabled()
1381 if (tb_port_read(port, &data, TB_CFG_PORT, in tb_pci_port_is_enabled()
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H A Dtunnel.c444 ret = tb_port_read(out, &val, TB_CFG_PORT, in tb_dp_cm_handshake()
451 ret = tb_port_write(out, &val, TB_CFG_PORT, in tb_dp_cm_handshake()
457 ret = tb_port_read(out, &val, TB_CFG_PORT, in tb_dp_cm_handshake()
647 ret = tb_port_read(in, &in_dp_cap, TB_CFG_PORT, in tb_dp_xchg_caps()
652 ret = tb_port_read(out, &out_dp_cap, TB_CFG_PORT, in tb_dp_xchg_caps()
747 ret = tb_port_read(in, &in_dp_cap, TB_CFG_PORT, in tb_dp_bandwidth_alloc_mode_enable()
915 ret = tb_port_read(in, &cap, TB_CFG_PORT, in tb_dp_bandwidth_mode_maximum_bandwidth()
1074 ret = tb_port_read(in, &val, TB_CFG_PORT, in tb_dp_read_dprx()
1290 if (tb_port_read(in, &dp_cap, TB_CFG_PORT, in tb_dp_dump()
1303 if (tb_port_read(out, &dp_cap, TB_CFG_PORT, in tb_dp_dump()
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H A Ddma_port.c96 .space = TB_CFG_PORT, in dma_port_read()
137 .space = TB_CFG_PORT, in dma_port_write()
H A Ddebugfs.c153 ret = tb_port_write(port, &val, TB_CFG_PORT, offset, 1); in regs_write()
1104 ret = tb_port_read(port, &data, TB_CFG_PORT, cap + offset + i, 1); in cap_show_by_dw()
1128 ret = tb_port_read(port, data, TB_CFG_PORT, cap + offset, in cap_show()
1156 ret = tb_port_read(port, &header, TB_CFG_PORT, cap, 1); in port_cap_show()
1203 ret = tb_port_read(port, (u32 *)&header + 1, TB_CFG_PORT, in port_cap_show()
1247 ret = tb_port_read(port, data, TB_CFG_PORT, 0, ARRAY_SIZE(data)); in port_basic_regs_show()
H A Dicm.c1864 ret = pcie2cio_read(icm, TB_CFG_PORT, port0, PHY_PORT_CS1, &val0); in icm_reset_phy_port()
1867 ret = pcie2cio_read(icm, TB_CFG_PORT, port1, PHY_PORT_CS1, &val1); in icm_reset_phy_port()
1881 ret = pcie2cio_write(icm, TB_CFG_PORT, port0, PHY_PORT_CS1, val0); in icm_reset_phy_port()
1886 ret = pcie2cio_write(icm, TB_CFG_PORT, port1, PHY_PORT_CS1, val1); in icm_reset_phy_port()
1893 ret = pcie2cio_read(icm, TB_CFG_PORT, port0, PHY_PORT_CS1, &val0); in icm_reset_phy_port()
1896 ret = pcie2cio_read(icm, TB_CFG_PORT, port1, PHY_PORT_CS1, &val1); in icm_reset_phy_port()
1901 ret = pcie2cio_write(icm, TB_CFG_PORT, port0, PHY_PORT_CS1, val0); in icm_reset_phy_port()
1906 return pcie2cio_write(icm, TB_CFG_PORT, port1, PHY_PORT_CS1, val1); in icm_reset_phy_port()
H A Dtb_msgs.h17 TB_CFG_PORT = 1, enumerator
H A Deeprom.c381 res = tb_port_read(port, &type, TB_CFG_PORT, 2, 1); in tb_drom_parse_entry_port()
H A Dctl.c1056 if (space == TB_CFG_PORT && in tb_cfg_get_error()
H A Dxdomain.c549 ret = tb_port_read(port, val, TB_CFG_PORT, in tb_xdp_link_state_status_response()
1297 ret = tb_port_read(port, &val, TB_CFG_PORT, port->cap_phy + LANE_ADP_CS_1, 1); in tb_xdomain_link_state_change()