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Searched refs:TA_BC_BASE_ADDR_HI__ADDRESS__SHIFT (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h10427 #define TA_BC_BASE_ADDR_HI__ADDRESS__SHIFT 0x00000000 macro
H A Dgfx_7_2_sh_mask.h13866 #define TA_BC_BASE_ADDR_HI__ADDRESS__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h16304 #define TA_BC_BASE_ADDR_HI__ADDRESS__SHIFT 0x0 macro
H A Dgfx_8_0_sh_mask.h15734 #define TA_BC_BASE_ADDR_HI__ADDRESS__SHIFT 0x0 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h14588 #define TA_BC_BASE_ADDR_HI__ADDRESS__SHIFT … macro
H A Dgc_9_1_sh_mask.h15895 #define TA_BC_BASE_ADDR_HI__ADDRESS__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h15757 #define TA_BC_BASE_ADDR_HI__ADDRESS__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h19613 #define TA_BC_BASE_ADDR_HI__ADDRESS__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h22033 #define TA_BC_BASE_ADDR_HI__ADDRESS__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h21943 #define TA_BC_BASE_ADDR_HI__ADDRESS__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h20156 #define TA_BC_BASE_ADDR_HI__ADDRESS__SHIFT … macro