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Searched refs:TA_BC_BASE_ADDR_HI__ADDRESS_MASK (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h10426 #define TA_BC_BASE_ADDR_HI__ADDRESS_MASK 0x000000ffL macro
H A Dgfx_7_2_sh_mask.h13865 #define TA_BC_BASE_ADDR_HI__ADDRESS_MASK 0xff macro
H A Dgfx_8_1_sh_mask.h16303 #define TA_BC_BASE_ADDR_HI__ADDRESS_MASK 0xff macro
H A Dgfx_8_0_sh_mask.h15733 #define TA_BC_BASE_ADDR_HI__ADDRESS_MASK 0xff macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h14589 #define TA_BC_BASE_ADDR_HI__ADDRESS_MASK … macro
H A Dgc_9_1_sh_mask.h15896 #define TA_BC_BASE_ADDR_HI__ADDRESS_MASK … macro
H A Dgc_9_2_1_sh_mask.h15758 #define TA_BC_BASE_ADDR_HI__ADDRESS_MASK … macro
H A Dgc_11_0_0_sh_mask.h19614 #define TA_BC_BASE_ADDR_HI__ADDRESS_MASK … macro
H A Dgc_10_1_0_sh_mask.h22034 #define TA_BC_BASE_ADDR_HI__ADDRESS_MASK … macro
H A Dgc_11_0_3_sh_mask.h21944 #define TA_BC_BASE_ADDR_HI__ADDRESS_MASK … macro
H A Dgc_10_3_0_sh_mask.h20157 #define TA_BC_BASE_ADDR_HI__ADDRESS_MASK … macro