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/openbmc/linux/arch/x86/crypto/
H A Daesni-intel_avx-x86_64.S889 vpsrldq $4, \T2, \T5 # shift-R T5 1 DW
912 vmovdqa \HK, \T5
918 GHASH_MUL_AVX \T5, \HK, \T1, \T3, \T4, \T6, \T2 # T5 = HashKey^2<<1 mod poly
924 GHASH_MUL_AVX \T5, \HK, \T1, \T3, \T4, \T6, \T2 # T5 = HashKey^3<<1 mod poly
930 GHASH_MUL_AVX \T5, \HK, \T1, \T3, \T4, \T6, \T2 # T5 = HashKey^4<<1 mod poly
936 GHASH_MUL_AVX \T5, \HK, \T1, \T3, \T4, \T6, \T2 # T5 = HashKey^5<<1 mod poly
942 GHASH_MUL_AVX \T5, \HK, \T1, \T3, \T4, \T6, \T2 # T5 = HashKey^6<<1 mod poly
948 GHASH_MUL_AVX \T5, \HK, \T1, \T3, \T4, \T6, \T2 # T5 = HashKey^7<<1 mod poly
954 GHASH_MUL_AVX \T5, \HK, \T1, \T3, \T4, \T6, \T2 # T5 = HashKey^8<<1 mod poly
1886 vmovdqa \HK, \T5
[all …]
H A Dnh-avx2-x86_64.S32 #define T5 %ymm13 macro
51 vpshufd $0x10, T1, T5
58 vpmuludq T5, T1, T1
149 vinserti128 $0x1, T3_XMM, T1, T5 // T5 = (0B 1B 2B 3B)
153 vpaddq T5, T4, T4
H A Dnh-sse2-x86_64.S26 #define T5 %xmm13 macro
53 pshufd $0x10, T1, T5
60 pmuludq T5, T1
/openbmc/linux/crypto/
H A Danubis.c387 static const u32 T5[256] = { variable
501 (T5[(K0 >> 24) ] & 0xff000000U) ^ in anubis_setkey()
502 (T5[(K0 >> 16) & 0xff] & 0x00ff0000U) ^ in anubis_setkey()
503 (T5[(K0 >> 8) & 0xff] & 0x0000ff00U) ^ in anubis_setkey()
504 (T5[(K0 ) & 0xff] & 0x000000ffU); in anubis_setkey()
506 (T5[(K1 >> 24) ] & 0xff000000U) ^ in anubis_setkey()
507 (T5[(K1 >> 16) & 0xff] & 0x00ff0000U) ^ in anubis_setkey()
508 (T5[(K1 >> 8) & 0xff] & 0x0000ff00U) ^ in anubis_setkey()
509 (T5[(K1 ) & 0xff] & 0x000000ffU); in anubis_setkey()
514 (T5[(K2 ) & 0xff] & 0x000000ffU); in anubis_setkey()
[all …]
H A Dkhazad.c483 static const u64 T5[256] = { variable
776 T5[(int)(K1 >> 16) & 0xff] ^ in khazad_setkey()
792 T5[(int)S[(int)(K1 >> 16) & 0xff] & 0xff] ^ in khazad_setkey()
818 T5[(int)(state >> 16) & 0xff] ^ in khazad_crypt()
829 (T5[(int)(state >> 16) & 0xff] & 0x0000000000ff0000ULL) ^ in khazad_crypt()
/openbmc/linux/arch/arm64/crypto/
H A Dsha512-armv8.pl463 my ($T0,$T1,$T2,$T3,$T4,$T5,$T6,$T7) = map("q$_",(4..7,16..19));
520 &ushr_32 ($T5,$T7,$sigma1[2]);
532 &eor_8 ($T5,$T5,$T4);
536 &eor_8 ($T5,$T5,$T3); # sigma1(X[14..15])
540 &add_32 (@X[0],@X[0],$T5); # X[0..1] += sigma1(X[14..15])
551 &ushr_32 ($T5,@X[0],$sigma1[1]);
557 &sli_32 ($T5,@X[0],32-$sigma1[1]);
562 &eor_8 ($T7,$T7,$T5); # sigma1(X[16..17])
565 &eor_8 ($T5,$T5,$T5);
568 &mov (&Dhi($T5), &Dlo($T7));
[all …]
H A Dnh-neon-core.S31 T5 .req v13
51 mov T5.d[0], T1.d[1]
55 umlal PASS1_SUMS.2d, T1.2s, T5.2s
H A Dsm4-ce-gcm-core.S53 r4, r5, m4, m5, T4, T5, \ argument
65 pmull T5.1q, m4.1d, T4.1d; \
77 eor T4.16b, T4.16b, T5.16b; \
81 ext T5.16b, RZERO.16b, T4.16b, #8; \
89 eor r4.16b, r4.16b, T5.16b; \
136 r4, r5, m4, m5, T4, T5) \ argument
154 pmull T5.1q, m4.1d, T4.1d; \
172 eor T4.16b, T4.16b, T5.16b; \
178 ext T5.16b, RZERO.16b, T4.16b, #8; \
190 eor r4.16b, r4.16b, T5.16b; \
/openbmc/linux/arch/arm/crypto/
H A Dsha256-armv4.pl292 my ($T0,$T1,$T2,$T3,$T4,$T5)=("q8","q9","q10","q11","d24","d25");
350 &vshr_u32 ($T5,&Dhi(@X[3]),$sigma1[2]);
356 &veor ($T5,$T5,$T4);
365 &veor ($T5,$T5,$T4); # sigma1(X[14..15])
368 &vadd_i32 (&Dlo(@X[0]),&Dlo(@X[0]),$T5);# X[0..1] += sigma1(X[14..15])
377 &vshr_u32 ($T5,&Dlo(@X[0]),$sigma1[2]);
380 &veor ($T5,$T5,$T4);
392 &veor ($T5,$T5,$T4); # sigma1(X[16..17])
395 &vadd_i32 (&Dhi(@X[0]),&Dhi(@X[0]),$T5);# X[2..3] += sigma1(X[16..17])
/openbmc/qemu/include/exec/
H A Dhelper-info.c.inc57 #define DEF_HELPER_FLAGS_5(NAME, FLAGS, RET, T1, T2, T3, T4, T5) \
63 | dh_typemask(T4, 4) | dh_typemask(T5, 5) \
66 #define DEF_HELPER_FLAGS_6(NAME, FLAGS, RET, T1, T2, T3, T4, T5, T6) \
72 | dh_typemask(T4, 4) | dh_typemask(T5, 5) \
76 #define DEF_HELPER_FLAGS_7(NAME, FLAGS, RET, T1, T2, T3, T4, T5, T6, T7) \
82 | dh_typemask(T4, 4) | dh_typemask(T5, 5) \
/openbmc/linux/drivers/infiniband/hw/cxgb4/
H A DKconfig3 tristate "Chelsio T4/T5 RDMA Driver"
9 This is an iWARP/RDMA driver for the Chelsio T4 and T5
10 1GbE, 10GbE adapters and T5 40GbE adapter.
/openbmc/linux/drivers/net/ethernet/chelsio/
H A DKconfig70 tristate "Chelsio Communications T4/T5/T6 Ethernet support"
77 This driver supports Chelsio T4, T5 & T6 based gigabit, 10Gb Ethernet
78 adapter and T5/T6 based 40Gb and T6 based 25Gb, 50Gb and 100Gb
93 bool "Data Center Bridging (DCB) Support for Chelsio T4/T5/T6 cards"
104 bool "Fibre Channel over Ethernet (FCoE) Support for Chelsio T5 cards"
115 tristate "Chelsio Communications T4/T5/T6 Virtual Function Ethernet support"
118 This driver supports Chelsio T4, T5 & T6 based gigabit, 10Gb Ethernet
119 adapters and T5/T6 based 40Gb and T6 based 25Gb, 50Gb and 100Gb
/openbmc/openbmc/meta-openembedded/meta-multimedia/recipes-multimedia/dvb-apps/files/dvb-scan-table/dvb-t/
H A Des-Alpicat50 [c68: T5, T5 Sports, T5 Estrellas, Net Fly Music]
H A Des-Mussara50 [c68: T5, T5 Sports, T5 Estrellas, Net Fly Music]
H A Des-Zaragoza39 [Canal 68: T5 ESTRELLAS, T5 SPORT, TELECINCO, FLYMUSIC]
H A Des-Lugo51 [TELECINCO, T5 ESTRELLAS, T5 SPORT, FLYMUSIC]
H A Des-Malaga50 [C68 Telecinco, T5 Estrellas, T5 Sport, FLYMUSIC, PUNTO RADIO]
/openbmc/linux/Documentation/devicetree/bindings/rng/
H A Dsparc_sun_oracle_rng.txt11 - 'ORCL,m4-rng' for SPARC T5/M5
15 /* linux LDOM on SPARC T5-2 */
/openbmc/linux/tools/perf/arch/riscv/util/
H A Dunwind-libdw.c52 dwarf_regs[30] = REG(T5); in libdw__arch_set_initial_registers()
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8192-asurada-spherion-r0.dts38 MATRIX_KEY(0x03, 0x04, 0) /* T5 */
H A Dmt8192-asurada-hayato-r1.dts20 MATRIX_KEY(0x03, 0x04, 0) /* T5 */
/openbmc/u-boot/doc/device-tree-bindings/video/
H A Dintel-gma.txt20 - intel,panel-power-backlight-on-delay : T5 time sequence
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsc7180-trogdor-pazquel360.dtsi43 MATRIX_KEY(0x03, 0x04, 0) /* T5 */
H A Dsc7180-trogdor-pazquel.dtsi56 MATRIX_KEY(0x03, 0x04, 0) /* T5 */
H A Dsc7180-trogdor-kingoftown.dts56 MATRIX_KEY(0x03, 0x04, 0) /* T5 */

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