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Searched refs:SYSREG (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/target/arm/hvf/
H A Dhvf.c171 #define SYSREG(op0, op1, crn, crm, op2) \ macro
178 SYSREG(SYSREG_OP0_MASK, \
183 #define SYSREG_OSLAR_EL1 SYSREG(2, 0, 1, 0, 4)
184 #define SYSREG_OSLSR_EL1 SYSREG(2, 0, 1, 1, 4)
185 #define SYSREG_OSDLR_EL1 SYSREG(2, 0, 1, 3, 4)
186 #define SYSREG_CNTPCT_EL0 SYSREG(3, 3, 14, 0, 1)
187 #define SYSREG_PMCR_EL0 SYSREG(3, 3, 9, 12, 0)
188 #define SYSREG_PMUSERENR_EL0 SYSREG(3, 3, 9, 14, 0)
189 #define SYSREG_PMCNTENSET_EL0 SYSREG(3, 3, 9, 12, 1)
190 #define SYSREG_PMCNTENCLR_EL0 SYSREG(3, 3, 9, 12, 2)
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/openbmc/qemu/target/xtensa/
H A Dxtensa-isa.c1509 #define CHECK_SYSREG(INTISA, SYSREG, ERRVAL) \ argument
1511 if ((SYSREG) < 0 || (SYSREG) >= (INTISA)->num_sysregs) { \