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Searched refs:SYSC_REG_RESET_CTRL (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/arch/mips/ralink/
H A Dreset.c19 #define SYSC_REG_RESET_CTRL 0x034 macro
27 rt_sysc_m32(0, RSTCTL_RESET_PCI, SYSC_REG_RESET_CTRL); in ralink_restart()
32 rt_sysc_w32(RSTCTL_RESET_SYSTEM, SYSC_REG_RESET_CTRL); in ralink_restart()
/openbmc/linux/drivers/clk/ralink/
H A Dclk-mt7621.c24 #define SYSC_REG_RESET_CTRL 0x34 macro
426 return regmap_update_bits(sysc, SYSC_REG_RESET_CTRL, BIT(id), BIT(id)); in mt7621_assert_device()
435 return regmap_update_bits(sysc, SYSC_REG_RESET_CTRL, BIT(id), 0); in mt7621_deassert_device()
H A Dclk-mtmips.c18 #define SYSC_REG_RESET_CTRL 0x34 macro
1012 return regmap_update_bits(sysc, SYSC_REG_RESET_CTRL, BIT(id), BIT(id)); in mtmips_assert_device()
1021 return regmap_update_bits(sysc, SYSC_REG_RESET_CTRL, BIT(id), 0); in mtmips_deassert_device()