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Searched refs:SYMCLK32_SE_CNTL (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_dccg.h68 DCCG_SF(SYMCLK32_SE_CNTL, SYMCLK32_SE0_SRC_SEL, mask_sh),\
69 DCCG_SF(SYMCLK32_SE_CNTL, SYMCLK32_SE1_SRC_SEL, mask_sh),\
70 DCCG_SF(SYMCLK32_SE_CNTL, SYMCLK32_SE2_SRC_SEL, mask_sh),\
71 DCCG_SF(SYMCLK32_SE_CNTL, SYMCLK32_SE3_SRC_SEL, mask_sh),\
72 DCCG_SF(SYMCLK32_SE_CNTL, SYMCLK32_SE0_EN, mask_sh),\
73 DCCG_SF(SYMCLK32_SE_CNTL, SYMCLK32_SE1_EN, mask_sh),\
74 DCCG_SF(SYMCLK32_SE_CNTL, SYMCLK32_SE2_EN, mask_sh),\
75 DCCG_SF(SYMCLK32_SE_CNTL, SYMCLK32_SE3_EN, mask_sh),\
H A Ddcn32_resource.h1293 SR(SYMCLK32_SE_CNTL), SR(SYMCLK32_LE_CNTL), \
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/
H A Ddcn31_dccg.h43 SR(SYMCLK32_SE_CNTL),\
95 DCCG_SF(SYMCLK32_SE_CNTL, SYMCLK32_SE0_SRC_SEL, mask_sh),\
96 DCCG_SF(SYMCLK32_SE_CNTL, SYMCLK32_SE1_SRC_SEL, mask_sh),\
97 DCCG_SF(SYMCLK32_SE_CNTL, SYMCLK32_SE2_SRC_SEL, mask_sh),\
98 DCCG_SF(SYMCLK32_SE_CNTL, SYMCLK32_SE3_SRC_SEL, mask_sh),\
99 DCCG_SF(SYMCLK32_SE_CNTL, SYMCLK32_SE0_EN, mask_sh),\
100 DCCG_SF(SYMCLK32_SE_CNTL, SYMCLK32_SE1_EN, mask_sh),\
101 DCCG_SF(SYMCLK32_SE_CNTL, SYMCLK32_SE2_EN, mask_sh),\
102 DCCG_SF(SYMCLK32_SE_CNTL, SYMCLK32_SE3_EN, mask_sh),\
H A Ddcn31_dccg.c189 REG_UPDATE_2(SYMCLK32_SE_CNTL, in dccg31_enable_symclk32_se()
198 REG_UPDATE_2(SYMCLK32_SE_CNTL, in dccg31_enable_symclk32_se()
207 REG_UPDATE_2(SYMCLK32_SE_CNTL, in dccg31_enable_symclk32_se()
216 REG_UPDATE_2(SYMCLK32_SE_CNTL, in dccg31_enable_symclk32_se()
235 REG_UPDATE_2(SYMCLK32_SE_CNTL, in dccg31_disable_symclk32_se()
244 REG_UPDATE_2(SYMCLK32_SE_CNTL, in dccg31_disable_symclk32_se()
253 REG_UPDATE_2(SYMCLK32_SE_CNTL, in dccg31_disable_symclk32_se()
262 REG_UPDATE_2(SYMCLK32_SE_CNTL, in dccg31_disable_symclk32_se()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/
H A Ddcn314_dccg.h50 SR(SYMCLK32_SE_CNTL),\
99 DCCG_SF(SYMCLK32_SE_CNTL, SYMCLK32_SE0_SRC_SEL, mask_sh),\
100 DCCG_SF(SYMCLK32_SE_CNTL, SYMCLK32_SE1_SRC_SEL, mask_sh),\
101 DCCG_SF(SYMCLK32_SE_CNTL, SYMCLK32_SE2_SRC_SEL, mask_sh),\
102 DCCG_SF(SYMCLK32_SE_CNTL, SYMCLK32_SE3_SRC_SEL, mask_sh),\
103 DCCG_SF(SYMCLK32_SE_CNTL, SYMCLK32_SE0_EN, mask_sh),\
104 DCCG_SF(SYMCLK32_SE_CNTL, SYMCLK32_SE1_EN, mask_sh),\
105 DCCG_SF(SYMCLK32_SE_CNTL, SYMCLK32_SE2_EN, mask_sh),\
106 DCCG_SF(SYMCLK32_SE_CNTL, SYMCLK32_SE3_EN, mask_sh),\
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_dccg.h278 uint32_t SYMCLK32_SE_CNTL; member