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Searched refs:SWCRR_SWRI (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/watchdog/
H A Dmpc8xxx_wdt.c35 #define SWCRR_SWRI 0x00000002 /* Software Watchdog Reset/Interrupt Select bit.*/ macro
88 tmp &= ~(SWCRR_SWTC | SWCRR_SWF | SWCRR_SWEN | SWCRR_SWRI | SWCRR_SWPR); in mpc8xxx_wdt_start()
92 tmp |= SWCRR_SWRI; in mpc8xxx_wdt_start()
/openbmc/u-boot/include/
H A Dmpc83xx.h478 #define SWCRR_SWRI 0x00000002 macro
482 SWCRR_SWRI | SWCRR_SWPR))
/openbmc/u-boot/arch/powerpc/cpu/mpc83xx/
H A Dstart.S509 ori r4, r4, (SWCRR_SWEN | SWCRR_SWRI | SWCRR_SWPR)