Searched refs:SUPER_CCLK_DIVIDER (Results 1 – 6 of 6) sorted by relevance
14 #define SUPER_CCLK_DIVIDER 0x80000000 macro
25 #define SUPER_CCLK_DIVIDER 0x80000000 macro
280 writel(SUPER_CCLK_DIVIDER, &clkrst->crc_super_cclk_div); in enable_cpu_clock()
68 writel(SUPER_CCLK_DIVIDER, &clkrst->crc_super_cclk_div); in enable_cpu_clocks()
64 writel(SUPER_CCLK_DIVIDER, &clkrst->crc_super_cclk_div); in enable_cpu_clocks()
77 #define SUPER_CCLK_DIVIDER 0x24 macro948 readl(clk_base + SUPER_CCLK_DIVIDER); in tegra20_cpu_clock_suspend()990 clk_base + SUPER_CCLK_DIVIDER); in tegra20_cpu_clock_resume()