| /openbmc/qemu/target/rx/ |
| H A D | insns.decode | 572 # SUB #uimm4, rd
574 # SUB dsp[rs].ub, rd
575 # SUB rs, rd
577 # SUB dsp[rs], rd
579 # SUB rs, rs2, rd
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| /openbmc/qemu/target/avr/ |
| H A D | insn.decode | 56 SUB 0001 10 . ..... .... @op_rd_rr
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| H A D | disas.c | 143 INSN(SUB, "r%d, r%d", a->rd, a->rr)
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| /openbmc/qemu/target/i386/tcg/ |
| H A D | decode-new.c.inc | 1739 [0x28] = X86_OP_ENTRY2(SUB, E,b, G,b, lock),
1740 [0x29] = X86_OP_ENTRY2(SUB, E,v, G,v, lock),
1741 [0x2A] = X86_OP_ENTRY2(SUB, G,b, E,b, lock),
1742 [0x2B] = X86_OP_ENTRY2(SUB, G,v, E,v, lock),
1743 [0x2C] = X86_OP_ENTRY2(SUB, 0,b, I,b, lock), /* AL, Ib */
1744 [0x2D] = X86_OP_ENTRY2(SUB, 0,v, I,z, lock), /* rAX, Iz */
1748 [0x38] = X86_OP_ENTRYrr(SUB, E,b, G,b),
1749 [0x39] = X86_OP_ENTRYrr(SUB, E,v, G,v),
1750 [0x3A] = X86_OP_ENTRYrr(SUB, G,b, E,b),
1751 [0x3B] = X86_OP_ENTRYrr(SUB, G,v, E,v),
[all …]
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| /openbmc/qemu/target/sparc/ |
| H A D | insns.decode | 245 SUB 10 ..... 0.0100 ..... . ............. @r_r_ri_cc
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| /openbmc/qemu/target/mips/tcg/ |
| H A D | micromips_translate.c.inc | 169 SUB = 0x6,
1683 case SUB:
2227 FINSN_3ARG_SDPS(SUB);
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| /openbmc/qemu/target/arm/tcg/ |
| H A D | mve_helper.c | 1872 #define DO_LDAVH(OP, TYPE, LTYPE, XCHG, SUB) \ argument
1884 if (SUB) { \
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| /openbmc/qemu/tests/tcg/i386/ |
| H A D | x86.csv | 2014 "SUB AL, imm8","SUBB imm8, AL","subb imm8, AL","2C ib","V","V","","","rw,r","Y","8"
2015 "SUB r/m8, imm8","SUBB imm8, r/m8","subb imm8, r/m8","80 /5 ib","V","V","","","rw,r","Y","8"
2016 "SUB r/m8, imm8","SUBB imm8, r/m8","subb imm8, r/m8","82 /5 ib","V","N.S.","","","rw,r","Y","8"
2017 "SUB r/m8, imm8","SUBB imm8, r/m8","subb imm8, r/m8","REX 80 /5 ib","N.E.","V","","pseudo64","rw,r"…
2018 "SUB r8, r/m8","SUBB r/m8, r8","subb r/m8, r8","2A /r","V","V","","","rw,r","Y","8"
2019 "SUB r8, r/m8","SUBB r/m8, r8","subb r/m8, r8","REX 2A /r","N.E.","V","","pseudo64","rw,r","Y","8"
2020 "SUB r/m8, r8","SUBB r8, r/m8","subb r8, r/m8","28 /r","V","V","","","rw,r","Y","8"
2021 "SUB r/m8, r8","SUBB r8, r/m8","subb r8, r/m8","REX 28 /r","N.E.","V","","pseudo64","rw,r","Y","8"
2022 "SUB EAX, imm32","SUBL imm32, EAX","subl imm32, EAX","2D id","V","V","","operand32","rw,r","Y","32"
2023 "SUB r/m32, imm32","SUBL imm32, r/m32","subl imm32, r/m32","81 /5 id","V","V","","operand32","rw,r"…
[all …]
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| /openbmc/qemu/disas/ |
| H A D | nanomips.c | 14408 static char *SUB(uint64 instruction, Dis_info *info) in SUB() function
16450 0xfc0003ff, 0x20000190, &SUB , 0,
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| /openbmc/openbmc/poky/meta/recipes-bsp/v86d/v86d/ |
| H A D | Update-x86emu-from-X.org.patch | 4576 DECODE_PRINTF("SUB\tEAX,");
4581 DECODE_PRINTF("SUB\tAX,");
17467 Implements the SUB instruction and side effects.
17503 Implements the SUB instruction and side effects.
17537 Implements the SUB instruction and side effects.
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