| /openbmc/linux/arch/x86/crypto/ |
| H A D | sha256_ni_asm.S | 67 #define STATE1 %xmm2 macro
115 pshufd $0x1B, STATE1, STATE1 /* EFGH */
126 movdqa STATE1, CDGH_SAVE
133 sha256rnds2 STATE0, STATE1
135 sha256rnds2 STATE1, STATE0
142 sha256rnds2 STATE0, STATE1
144 sha256rnds2 STATE1, STATE0
152 sha256rnds2 STATE0, STATE1
154 sha256rnds2 STATE1, STATE0
310 paddd CDGH_SAVE, STATE1
[all …]
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| H A D | aegis128-aesni-asm.S | 14 #define STATE1 %xmm1 macro
57 aesenc STATE1, STATE0
58 aesenc STATE2, STATE1
207 pxor STATE1, STATE4
223 movdqu STATE1, 0x10(STATEP)
244 movdqu 0x10(STATEP), STATE1
278 pxor MSG, STATE1
318 pxor MSG, STATE1
517 pxor STATE1, T0
670 pxor STATE1, MSG
[all …]
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| H A D | aesni-intel_asm.S | 128 #define STATE1 %xmm0 macro
132 #define STATE STATE1
2523 pxor IV, STATE1
2772 movaps IV, STATE1
2785 pxor IN1, STATE1
2874 movdqa IV, STATE1
2876 pxor IN, STATE1
2900 pxor IN, STATE1
3034 movdqa IV, STATE1
3036 pxor IN, STATE1
[all …]
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| /openbmc/linux/drivers/gpu/drm/radeon/ |
| H A D | btcd.h | 94 #define STATE1(x) ((x) << 5) macro
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| H A D | rv6xxd.h | 189 # define STATE1(x) ((x) << 8) macro
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| H A D | rv770d.h | 293 #define STATE1(x) ((x) << 8) macro
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| H A D | nid.h | 768 #define STATE1(x) ((x) << 5) macro
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| H A D | sid.h | 519 #define STATE1(x) ((x) << 5) macro
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| H A D | cikd.h | 644 #define STATE1(x) ((x) << 5) macro
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| H A D | evergreend.h | 279 #define STATE1(x) ((x) << 5) macro
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| H A D | rv6xx_dpm.c | 811 STATE1(64 * high_clock / pi->hw.sclks[R600_POWER_LEVEL_MEDIUM]) | in rv6xx_program_memory_timing_parameters()
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| H A D | cypress_dpm.c | 935 mc_arb_burst_time |= STATE1(cypress_calculate_burst_time(rdev, in cypress_program_memory_timing_parameters()
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| H A D | rv770_dpm.c | 759 STATE1(64 * high_clock / state->low.sclk) | in rv770_program_memory_timing_parameters()
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| H A D | ni_dpm.c | 1546 WREG32_P(MC_ARB_BURST_TIME, STATE1(burst_time), ~STATE1_MASK); in ni_copy_and_switch_arb_sets()
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| /openbmc/u-boot/drivers/video/tegra124/ |
| H A D | sor.c | 543 DUMP_REG(STATE1); in dump_sor_reg()
631 tegra_sor_writel(sor, STATE1, reg_val); in tegra_dc_sor_config_panel()
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| H A D | sor.h | 27 #define STATE1 0x4 macro
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| /openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | sid.h | 520 #define STATE1(x) ((x) << 5) macro
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| /openbmc/qemu/target/arm/ |
| H A D | cpu.h | 2210 FIELD(ID_PFR0, STATE1, 4, 4)
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| /openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| H A D | smu7_hwmgr.c | 530 burst_time = PHM_READ_FIELD(hwmgr->device, MC_ARB_BURST_TIME, STATE1); in smu7_copy_and_switch_arb_sets()
545 PHM_WRITE_FIELD(hwmgr->device, MC_ARB_BURST_TIME, STATE1, burst_time); in smu7_copy_and_switch_arb_sets()
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| /openbmc/linux/drivers/gpu/drm/amd/pm/legacy-dpm/ |
| H A D | si_dpm.c | 3118 WREG32_P(MC_ARB_BURST_TIME, STATE1(burst_time), ~STATE1_MASK); in ni_copy_and_switch_arb_sets()
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