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Searched refs:SSCG_PLL_PD_MASK (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-imx/imx8m/
H A Dclock.c198 if (pll_cfg0 & SSCG_PLL_PD_MASK) in decode_sscg_pll()
638 clrbits_le32(pll_control_reg, SSCG_PLL_PD_MASK); in dram_pll_init()
/openbmc/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dclock.h547 #define SSCG_PLL_PD_MASK BIT(7) macro