Searched refs:SSCG_PLL_FEEDBACK_DIV_F1_VAL (Results 1 – 2 of 2) sorted by relevance
593 val |= SSCG_PLL_FEEDBACK_DIV_F1_VAL(39); in dram_pll_init()605 val |= SSCG_PLL_FEEDBACK_DIV_F1_VAL(39); in dram_pll_init()617 val |= SSCG_PLL_FEEDBACK_DIV_F1_VAL(39); in dram_pll_init()629 val |= SSCG_PLL_FEEDBACK_DIV_F1_VAL(45); in dram_pll_init()705 val_cfg2 = SSCG_PLL_FEEDBACK_DIV_F1_VAL(3) | in sscg_pll_init()720 val_cfg2 = SSCG_PLL_FEEDBACK_DIV_F1_VAL(3) | in sscg_pll_init()735 val_cfg2 = SSCG_PLL_FEEDBACK_DIV_F1_VAL(3) | in sscg_pll_init()
571 #define SSCG_PLL_FEEDBACK_DIV_F1_VAL(n) (((n) << 13) & \ macro