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Searched refs:SSCG_PLL_DIV4_CLKE_MASK (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-imx/imx8m/
H A Dclock.c164 pll_clke = SSCG_PLL_DIV4_CLKE_MASK; in decode_sscg_pll()
709 SSCG_PLL_DIV3_CLKE_MASK | SSCG_PLL_DIV4_CLKE_MASK | in sscg_pll_init()
724 SSCG_PLL_DIV3_CLKE_MASK | SSCG_PLL_DIV4_CLKE_MASK | in sscg_pll_init()
795 SSCG_PLL_DIV4_CLKE_MASK | SSCG_PLL_DIV5_CLKE_MASK | in clock_init()
801 SSCG_PLL_DIV4_CLKE_MASK | SSCG_PLL_DIV5_CLKE_MASK | in clock_init()
/openbmc/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dclock.h538 #define SSCG_PLL_DIV4_CLKE_MASK BIT(19) macro