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Searched refs:SR_MD (Results 1 – 7 of 7) sorted by relevance

/openbmc/qemu/target/sh4/
H A Dhelper.c147 env->sr |= (1u << SR_BL) | (1u << SR_MD) | (1u << SR_RB); in superh_cpu_do_interrupt()
334 use_asid = !(env->mmucr & MMUCR_SV) || !(env->sr & (1u << SR_MD)); in get_mmu_address()
340 if (!(env->sr & (1u << SR_MD)) && !(matching->pr & 2)) { in get_mmu_address()
350 if (!(env->sr & (1u << SR_MD)) && !(matching->pr & 2)) { in get_mmu_address()
368 if (!(env->sr & (1u << SR_MD)) && !(matching->pr & 2)) { in get_mmu_address()
400 if (!(env->sr & (1u << SR_MD)) in get_physical_address()
611 int use_asid = !(s->mmucr & MMUCR_SV) || !(s->sr & (1u << SR_MD)); in cpu_sh4_write_mmaped_utlb_addr()
741 int use_asid = !(env->mmucr & MMUCR_SV) || !(env->sr & (1u << SR_MD)); in cpu_sh4_is_cached()
744 if (env->sr & (1u << SR_MD)) { in cpu_sh4_is_cached()
H A Dgdbstub.c34 if ((env->sr & (1u << SR_MD)) && (env->sr & (1u << SR_RB))) { in superh_cpu_gdb_read_register()
84 if ((env->sr & (1u << SR_MD)) && (env->sr & (1u << SR_RB))) { in superh_cpu_gdb_write_register()
H A Dcpu.h37 #define SR_MD 30 macro
93 #define TB_FLAG_SR_MD (1 << SR_MD) /* 30 */
286 return (env->sr & (1u << SR_MD)) == 0 ? 1 : 0; in cpu_mmu_index()
H A Dcpu.c110 env->sr = (1u << SR_MD) | (1u << SR_RB) | (1u << SR_BL) | in superh_cpu_reset_hold()
H A Dtranslate.c56 #define IS_USER(ctx) (!(ctx->tbflags & (1u << SR_MD)))
2195 ctx->memidx = (tbflags & (1u << SR_MD)) == 0 ? 1 : 0; in sh4_tr_init_disas_context()
2201 ctx->gbank = ((tbflags & (1 << SR_MD)) && in sh4_tr_init_disas_context()
/openbmc/linux/arch/sh/include/asm/
H A Dprocessor_32.h51 #define SR_MD 0x40000000 macro
/openbmc/linux/arch/sh/kernel/
H A Dprocess_32.c119 childregs->sr = SR_MD; in copy_thread()