Searched refs:SREG (Results 1 – 3 of 3) sorted by relevance
| /openbmc/u-boot/arch/riscv/cpu/ |
| H A D | mtrap.S | 19 #define SREG sw macro
23 #define SREG sd macro
34 SREG x1, 1 * REGBYTES(sp)
35 SREG x2, 2 * REGBYTES(sp)
36 SREG x3, 3 * REGBYTES(sp)
37 SREG x4, 4 * REGBYTES(sp)
38 SREG x5, 5 * REGBYTES(sp)
39 SREG x6, 6 * REGBYTES(sp)
40 SREG x7, 7 * REGBYTES(sp)
41 SREG x8, 8 * REGBYTES(sp)
[all …]
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| H A D | start.S | 21 #define SREG sw macro
28 #define SREG sd macro
70 SREG s1, 0(t0)
75 SREG s0, GD_BOOT_HART(gp)
111 SREG t5, 0(t1)
138 SREG t5, 0(t3)
161 SREG t5, 0(t3)
181 SREG zero, 0(t0) /* clear loop... */
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| /openbmc/qemu/target/arm/tcg/ |
| H A D | sme_helper.c | 2079 #define UNPK(NAME, SREG, TW, TN, HW, HN) \ argument
2082 ARMVectorReg scratch[SREG]; \
2085 if (vectors_overlap(vd, 2 * SREG, vs, SREG)) { \
2088 for (size_t r = 0; r < SREG; ++r) { \
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