Searched refs:SRC_M4RCR (Results 1 – 3 of 3) sorted by relevance
/openbmc/linux/drivers/reset/ |
H A D | reset-imx7.c | 38 SRC_M4RCR = 0x000c, enumerator 68 [IMX7_RESET_SW_M4C_RST] = { SRC_M4RCR, BIT(1) }, 69 [IMX7_RESET_SW_M4P_RST] = { SRC_M4RCR, BIT(2) }, 180 [IMX8MQ_RESET_SW_NON_SCLR_M4C_RST] = { SRC_M4RCR, BIT(0) }, 181 [IMX8MQ_RESET_SW_M4C_RST] = { SRC_M4RCR, BIT(1) }, 182 [IMX8MQ_RESET_SW_M4P_RST] = { SRC_M4RCR, BIT(2) }, 183 [IMX8MQ_RESET_M4_ENABLE] = { SRC_M4RCR, BIT(3) }, 292 [IMX8MP_RESET_SW_NON_SCLR_M7C_RST] = { SRC_M4RCR, BIT(0) },
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/openbmc/qemu/include/hw/misc/ |
H A D | imx7_src.h | 20 #define SRC_M4RCR 3 macro
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/openbmc/qemu/hw/misc/ |
H A D | imx7_src.c | 35 case SRC_M4RCR: in imx7_src_reg_name()
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