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Searched refs:SQ_WAVE_STATUS__HALT_MASK (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9974 #define SQ_WAVE_STATUS__HALT_MASK 0x00002000L macro
H A Dgfx_7_2_sh_mask.h12501 #define SQ_WAVE_STATUS__HALT_MASK 0x2000 macro
H A Dgfx_8_0_sh_mask.h14381 #define SQ_WAVE_STATUS__HALT_MASK 0x2000 macro
H A Dgfx_8_1_sh_mask.h14779 #define SQ_WAVE_STATUS__HALT_MASK 0x2000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h28444 #define SQ_WAVE_STATUS__HALT_MASK … macro
H A Dgc_9_2_1_sh_mask.h29986 #define SQ_WAVE_STATUS__HALT_MASK … macro
H A Dgc_9_1_sh_mask.h29660 #define SQ_WAVE_STATUS__HALT_MASK … macro
H A Dgc_9_4_3_sh_mask.h31345 #define SQ_WAVE_STATUS__HALT_MASK … macro
H A Dgc_9_4_2_sh_mask.h32717 #define SQ_WAVE_STATUS__HALT_MASK … macro
H A Dgc_11_0_0_sh_mask.h41466 #define SQ_WAVE_STATUS__HALT_MASK … macro
H A Dgc_11_0_3_sh_mask.h44503 #define SQ_WAVE_STATUS__HALT_MASK … macro
H A Dgc_10_1_0_sh_mask.h42761 #define SQ_WAVE_STATUS__HALT_MASK … macro
H A Dgc_10_3_0_sh_mask.h48004 #define SQ_WAVE_STATUS__HALT_MASK … macro