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Searched refs:SQ_WAVE_M0__M0__SHIFT (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9937 #define SQ_WAVE_M0__M0__SHIFT 0x00000000 macro
H A Dgfx_7_2_sh_mask.h12594 #define SQ_WAVE_M0__M0__SHIFT 0x0 macro
H A Dgfx_8_0_sh_mask.h14480 #define SQ_WAVE_M0__M0__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h14878 #define SQ_WAVE_M0__M0__SHIFT 0x0 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h28629 #define SQ_WAVE_M0__M0__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h30171 #define SQ_WAVE_M0__M0__SHIFT … macro
H A Dgc_9_1_sh_mask.h29843 #define SQ_WAVE_M0__M0__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h31542 #define SQ_WAVE_M0__M0__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h32899 #define SQ_WAVE_M0__M0__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h41637 #define SQ_WAVE_M0__M0__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h44679 #define SQ_WAVE_M0__M0__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h42993 #define SQ_WAVE_M0__M0__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h48219 #define SQ_WAVE_M0__M0__SHIFT … macro