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Searched refs:SQ_WAVE_IB_STS__VM_CNT__SHIFT (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9927 #define SQ_WAVE_IB_STS__VM_CNT__SHIFT 0x00000000 macro
H A Dgfx_7_2_sh_mask.h12586 #define SQ_WAVE_IB_STS__VM_CNT__SHIFT 0x0 macro
H A Dgfx_8_0_sh_mask.h14468 #define SQ_WAVE_IB_STS__VM_CNT__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h14866 #define SQ_WAVE_IB_STS__VM_CNT__SHIFT 0x0 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h28509 #define SQ_WAVE_IB_STS__VM_CNT__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h30051 #define SQ_WAVE_IB_STS__VM_CNT__SHIFT … macro
H A Dgc_9_1_sh_mask.h29723 #define SQ_WAVE_IB_STS__VM_CNT__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h31422 #define SQ_WAVE_IB_STS__VM_CNT__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h32782 #define SQ_WAVE_IB_STS__VM_CNT__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h41519 #define SQ_WAVE_IB_STS__VM_CNT__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h44558 #define SQ_WAVE_IB_STS__VM_CNT__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h42833 #define SQ_WAVE_IB_STS__VM_CNT__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h48076 #define SQ_WAVE_IB_STS__VM_CNT__SHIFT … macro