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Searched refs:SQ_WAVE_IB_DBG0__PC_INVALID_MASK (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9918 #define SQ_WAVE_IB_DBG0__PC_INVALID_MASK 0x00000008L macro
H A Dgfx_7_2_sh_mask.h12451 #define SQ_WAVE_IB_DBG0__PC_INVALID_MASK 0x8 macro
H A Dgfx_8_0_sh_mask.h14321 #define SQ_WAVE_IB_DBG0__PC_INVALID_MASK 0x8 macro
H A Dgfx_8_1_sh_mask.h14719 #define SQ_WAVE_IB_DBG0__PC_INVALID_MASK 0x8 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h28550 #define SQ_WAVE_IB_DBG0__PC_INVALID_MASK … macro
H A Dgc_9_2_1_sh_mask.h30092 #define SQ_WAVE_IB_DBG0__PC_INVALID_MASK … macro
H A Dgc_9_1_sh_mask.h29764 #define SQ_WAVE_IB_DBG0__PC_INVALID_MASK … macro
H A Dgc_9_4_3_sh_mask.h31463 #define SQ_WAVE_IB_DBG0__PC_INVALID_MASK … macro
H A Dgc_9_4_2_sh_mask.h32823 #define SQ_WAVE_IB_DBG0__PC_INVALID_MASK … macro