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Searched refs:SQ_WAVE_IB_DBG0__IBUF_WPTR_MASK (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9902 #define SQ_WAVE_IB_DBG0__IBUF_WPTR_MASK 0x00000c00L macro
H A Dgfx_7_2_sh_mask.h12459 #define SQ_WAVE_IB_DBG0__IBUF_WPTR_MASK 0xc00 macro
H A Dgfx_8_0_sh_mask.h14329 #define SQ_WAVE_IB_DBG0__IBUF_WPTR_MASK 0xc00 macro
H A Dgfx_8_1_sh_mask.h14727 #define SQ_WAVE_IB_DBG0__IBUF_WPTR_MASK 0xc00 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h28554 #define SQ_WAVE_IB_DBG0__IBUF_WPTR_MASK … macro
H A Dgc_9_2_1_sh_mask.h30096 #define SQ_WAVE_IB_DBG0__IBUF_WPTR_MASK … macro
H A Dgc_9_1_sh_mask.h29768 #define SQ_WAVE_IB_DBG0__IBUF_WPTR_MASK … macro
H A Dgc_9_4_3_sh_mask.h31467 #define SQ_WAVE_IB_DBG0__IBUF_WPTR_MASK … macro
H A Dgc_9_4_2_sh_mask.h32827 #define SQ_WAVE_IB_DBG0__IBUF_WPTR_MASK … macro