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Searched refs:SQ_WAVE_IB_DBG0__IBUF_RPTR__SHIFT (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9899 #define SQ_WAVE_IB_DBG0__IBUF_RPTR__SHIFT 0x00000008 macro
H A Dgfx_7_2_sh_mask.h12458 #define SQ_WAVE_IB_DBG0__IBUF_RPTR__SHIFT 0x8 macro
H A Dgfx_8_0_sh_mask.h14328 #define SQ_WAVE_IB_DBG0__IBUF_RPTR__SHIFT 0x8 macro
H A Dgfx_8_1_sh_mask.h14726 #define SQ_WAVE_IB_DBG0__IBUF_RPTR__SHIFT 0x8 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h28540 #define SQ_WAVE_IB_DBG0__IBUF_RPTR__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h30082 #define SQ_WAVE_IB_DBG0__IBUF_RPTR__SHIFT … macro
H A Dgc_9_1_sh_mask.h29754 #define SQ_WAVE_IB_DBG0__IBUF_RPTR__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h31453 #define SQ_WAVE_IB_DBG0__IBUF_RPTR__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h32813 #define SQ_WAVE_IB_DBG0__IBUF_RPTR__SHIFT … macro