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Searched refs:SQ_WAVE_HW_ID__ME_ID_MASK (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9874 #define SQ_WAVE_HW_ID__ME_ID_MASK 0xc0000000L macro
H A Dgfx_7_2_sh_mask.h12571 #define SQ_WAVE_HW_ID__ME_ID_MASK 0xc0000000 macro
H A Dgfx_8_0_sh_mask.h14453 #define SQ_WAVE_HW_ID__ME_ID_MASK 0xc0000000 macro
H A Dgfx_8_1_sh_mask.h14851 #define SQ_WAVE_HW_ID__ME_ID_MASK 0xc0000000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h28493 #define SQ_WAVE_HW_ID__ME_ID_MASK … macro
H A Dgc_9_2_1_sh_mask.h30035 #define SQ_WAVE_HW_ID__ME_ID_MASK … macro
H A Dgc_9_1_sh_mask.h29707 #define SQ_WAVE_HW_ID__ME_ID_MASK … macro
H A Dgc_9_4_3_sh_mask.h31404 #define SQ_WAVE_HW_ID__ME_ID_MASK … macro
H A Dgc_9_4_2_sh_mask.h32764 #define SQ_WAVE_HW_ID__ME_ID_MASK … macro