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Searched refs:SQ_WAVE_HW_ID__CU_ID_MASK (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9872 #define SQ_WAVE_HW_ID__CU_ID_MASK 0x00000f00L macro
H A Dgfx_7_2_sh_mask.h12557 #define SQ_WAVE_HW_ID__CU_ID_MASK 0xf00 macro
H A Dgfx_8_0_sh_mask.h14439 #define SQ_WAVE_HW_ID__CU_ID_MASK 0xf00 macro
H A Dgfx_8_1_sh_mask.h14837 #define SQ_WAVE_HW_ID__CU_ID_MASK 0xf00 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h28486 #define SQ_WAVE_HW_ID__CU_ID_MASK … macro
H A Dgc_9_2_1_sh_mask.h30028 #define SQ_WAVE_HW_ID__CU_ID_MASK … macro
H A Dgc_9_1_sh_mask.h29700 #define SQ_WAVE_HW_ID__CU_ID_MASK … macro
H A Dgc_9_4_3_sh_mask.h31397 #define SQ_WAVE_HW_ID__CU_ID_MASK … macro
H A Dgc_9_4_2_sh_mask.h32757 #define SQ_WAVE_HW_ID__CU_ID_MASK … macro