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Searched refs:SQ_SOPC__OP_MASK (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9508 #define SQ_SOPC__OP_MASK 0x007f0000L macro
H A Dgfx_7_2_sh_mask.h13105 #define SQ_SOPC__OP_MASK 0x7f0000 macro
H A Dgfx_8_0_sh_mask.h15003 #define SQ_SOPC__OP_MASK 0x7f0000 macro
H A Dgfx_8_1_sh_mask.h15401 #define SQ_SOPC__OP_MASK 0x7f0000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h2926 #define SQ_SOPC__OP_MASK macro
H A Dgc_9_2_1_sh_mask.h2732 #define SQ_SOPC__OP_MASK macro
H A Dgc_9_1_sh_mask.h2774 #define SQ_SOPC__OP_MASK macro
H A Dgc_9_4_3_sh_mask.h3204 #define SQ_SOPC__OP_MASK macro
H A Dgc_9_4_2_sh_mask.h26415 #define SQ_SOPC__OP_MASK macro