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Searched refs:SQ_SOP2__SSRC1__SHIFT (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9505 #define SQ_SOP2__SSRC1__SHIFT 0x00000008 macro
H A Dgfx_7_2_sh_mask.h12936 #define SQ_SOP2__SSRC1__SHIFT 0x8 macro
H A Dgfx_8_0_sh_mask.h14820 #define SQ_SOP2__SSRC1__SHIFT 0x8 macro
H A Dgfx_8_1_sh_mask.h15218 #define SQ_SOP2__SSRC1__SHIFT 0x8 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h2910 #define SQ_SOP2__SSRC1__SHIFT macro
H A Dgc_9_2_1_sh_mask.h2716 #define SQ_SOP2__SSRC1__SHIFT macro
H A Dgc_9_1_sh_mask.h2758 #define SQ_SOP2__SSRC1__SHIFT macro
H A Dgc_9_4_3_sh_mask.h3188 #define SQ_SOP2__SSRC1__SHIFT macro
H A Dgc_9_4_2_sh_mask.h26399 #define SQ_SOP2__SSRC1__SHIFT macro